收发器、触发器、锁存器、寄存器
GT74LVC595
The GT74LVC595 device contains an 8-bit, serialin,parallel-out shift register that feeds an 8-bit D-type storage register.The storage register has parallel 3-state outputs.Separate clocks are provided for both the shift and storage register.Both the shift register and storage register have separate clocks. The shift register clock (SRCLK) is positive-edge triggered. Data is shifted on the positive-going transitions of the SRCLK. The storage register clock (RCLK) is also positive-edge triggered.The data in each register is transferred to the storage register on a positive-going transition of the RCLK.The shift register has a direct overriding clear ( —————————— SRCLR ) input,serial (SER) input, and a serial output (QH') for cascading.When the output-enable ( _____ OE) input is high, the storage register outputs are in a highimpedance state. Internal register data and serial output (QH') are not impacted by the operation of the _____ OE input.
特性
- Wide Operating Voltage Range: 1.65V to 5.5V
- Inputs Accept Voltages Higher than the Supply Voltage
- All Inputs with Schmitt-Trigger Actions
- Shift register has direct clear
- Balanced Propagation Delays
- Operation Temperature Range –40°C to +125°C, TA
- Available in Green TSSOP16 and SOP16 Packages
应用
- Output expansion
- LED matrix control
- 7-segment display control
- 8-bit data storage
